combinational circuit造句
例句与造句
- We have so far studied combinational circuits .
到现在为止，我们已研究了组合电路。 - A combinational circuit with only one output channel
一种只具有一个输出通道的组合电路。 - Delay analysis of combinational circuit in using programmable logic device
用可编程逻辑器件进行组合电路设计时的延时分析 - This paper discusses equivalence checking for combinational circuits and analyzes the key techniques of fan algorithm
摘要讨论了组合电路的等价性检验方法，分析了fan算法的关键技术。 - We check equivalence of combinational circuits with fun algorithm , and experimental results show that fan algorithm is efficient
利用该算法进行了组合电路的等价性检验，实验结果表明了该方法的有效性。 - It's difficult to find combinational circuit in a sentence. 用combinational circuit造句挺难的
- Compared with the method only using universal cut or special cut , the method can obviously improve the speed of verification for combinational circuits
与只基于通用割集或专用割集的验证方法相比，该方法可以使组合电路的验证速度明显提高。 - To increase the speed of equivalence checking for combinational circuits , a new method using internal equivalence information of circuits in verification was proposed
摘要为了提高组合电路的等价性验证速度，提出了一种利用电路内部等价信息的新型验证方法。 - The method of optimization is classified into two categories : ( 1 ) combinational optimization method , which is the optimizational method of combinational circuit is directly used for the sequence circuit
优化的方法大致可分为两类： ( 1 )组合优化方法，即将组合电路的优化方法直接用于时序电路。 - Based on rtl circuits structure described in etbl , this dissertation presents two hierarchical atpg algorithms based on structure for rtl combinational circuits . the two algorithms generate tests for rtl circuits by test sets for modules
本文在etbl描述的rtl电路结构的基础上，进行rtl组合电路自动测试产生算法的研究，提出了两个基于结构的rtl组合电路分层测试产生算法。 - Power sensitivity is defined and some related mathematical models are deduced , which bring on a set of theoretic power sensitivity analysis methods for combinational circuits . experimental results verify that the method can be used for dynamic power and leakage power
另外文章还提出了一种静态功耗压缩估计方法和一种双阈值电压快速优化方法,它可以很好地用在低漏电电路的设计中。 - Its innovation is to extend existed fanout - free region pwtitioning methods of combinational circuits to synchionous sequentia1 circuits , and combines fanout source fault simulation and critical path tracing . experimental resu1ts reveal that the efficiency of it is better than that of generic word - level fault parallel fs algorithms
该算法的创新在于扩充了现有的组合电路无扇出区划分方法，使之对时序电路适用，并把它与扇出源故障并行模拟和临界路径追踪方法相结合。